20911 sy 20110127-s00004 no.a1919-1/8 http://onsemi.com semiconductor components industries, llc, 2013 june, 2013 LV0223CV overview the LV0223CV is a front monitor optoelectronic ic for optical pickups that has a built-in photo diode compatible with three waveforms. LV0223CV is sm all size and type csp packages. functions ? pin photodiode compatible with three wavelengths incorporated. ? gain adjustment (-6db to +6db in 256 steps) through serial communication. ? amplifier to amplify differential output. specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc 6v allowable power dissipation pd glass epoxy both-side substrate 55mm 45mm 1.6mm copper foil area (head: about 90% tail: about 90%), ta=75 ? c 143 mw operating temperature topr -20 to +75 ? c storage temperature tstg -40 to +100 ? c recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit min typ max operating supply voltage v cc 4.5 5 5.5 v output load capacitance c o 12 20 33 pf output load resistance z o 3 k orderin g numbe r : ena1919 monolithic linear ic front monitor oe-ic for optical pickups ordering number : ena1919 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
LV0223CV no.a1919-2/8 electrical characteristics at ta = 25 c, v cc = 5v, rl=6k , cl=20pf parameter symbol conditions ratings unit min typ max current dissipation i cc 13.3 17 22.1 ma sleep current islp 0.6 ma output voltage when shielded v c at shielding 1.85 2.0 2.15 v output offset voltage vofs at shielding, voltage between vop-von -30 0 30 mv temperature dependence of offset voltage *1 vofs ta=-10 to +75 ? c -60 0 60 v/ ? c optical output voltage *1 voltage between vop-von vlc low gain, =780nm, g=0db 0.21 0.262 0.31 mv/ w vld low gain, =650nm, g=0db 0.22 0.275 0.33 mv/ w vlb low gain, =405nm, g=0db 0.14 0.172 0.21 mv/ w vm1c middle1 gain, =780nm, g=0db 0.66 0.83 0.99 mv/ w vm1d middle1 gain, =650nm, g=0db 0.70 0.87 1.05 mv/ w vm1b middle1 gain, =405nm, g=0db 0.43 0.54 0.65 mv/ w vm2c middle2 gain, =780nm, g=0db 1.97 2.46 2.95 mv/ w vm2d middle2 gain, =650nm, g=0db 2.07 2.58 3.10 mv/ w vm2b middle2 gain, =405nm, g=0db 1.29 1.62 1.94 mv/ w vh1c high1 gain, =780nm, g=0db 3.35 4.19 5.02 mv/ w vh1d high1 gain, =650nm, g=0db 3.52 4.40 5.28 mv/ w vh1b high1 gain, =405nm, g=0db 2.20 2.75 3.30 mv/ w vh2c high2 gain, =780nm, g=0db 5.72 7.15 8.58 mv/ w vh2d high2 gain, =650nm, g=0db 6.02 7.52 9.02 mv/ w vh2b high2 gain, =405nm, g=0db 3.76 4.70 5.64 mv/ w light output voltage adjustment range *1 g g=0db refere nce, absolute value of adj ustment width 5.5 6.0 6.5 db d range *1 vod voltage between vop-von 1700 2200 mv frequency characteristics *1, *2 fcc -3db(1mhz reference), =780nm light input = 40 w(dc) + 20 w(ac) 60 80 mhz fcd1 -3db(1mhz reference), =650nm light input = 40 w(dc) + 20 w(ac) low/middle1/2 gain 60 85 mhz fcd2 -3db(1mhz reference), =650nm light input = 40 w(dc) + 20 w(ac) high1/2 gain 60 80 mhz fcb1 -3db(1mhz reference), =405nm light input = 40 w(dc) + 20 w(ac) low/middle1/2 gain 60 85 mhz fcb2 -3db(1mhz reference), =405nm light input = 40 w(dc) + 20 w(ac) high1/2 gain 60 80 mhz settling time *1 tset 10 15 ns response time *1 tr, tf vo=0.9vp-p, output level 10 to 90% fc=10mhz, duty=50% 4 10 ns overshoot *1 ovst vo=0.9vp-p, g=0db 15 % undershoot *1 unst vo=0.9vp-p, g=0db 15 % linearity *1 lin at output voltage 0.5v and 1.0v (between vop-von) -1 0 1 % light-output voltage temperature dependence voltage between vop-von *1, *3 tc =780nm, 25 ? c reference 7 10 13 % td =650nm, 25 ? c reference -1 2 5 % tb =405nm, 25 ? c reference -1 2 5 % item with *1 mark indicate the design reference value. item with *2 mark indicate the frequency characteristics when vop and von are applied individually. the frequency characteristics are for the out put voltage adjustment range is -6 to +6db item with *3 mark indicates the temperature dependence for the case of high2 / high1 / middle2 / middle1 / low gain and for the case when the temperature is 25 to 75 ? c for the output voltage adjustment range of -6 to +6db [expression of output voltage] v n = (sensitivity / 2 ) 5400 / (5400-16 gcastep ) light intensity ( w)
LV0223CV no.a1919-3/8 package dimensions unit : mm (typ) 3407 pin assignment pin no. pin name function 1a sdio serial communication data pin 1b vop positive side output pin 1c von negative side output pin 2a sclk serial communication clock pin 2c ssel register selection pin ssel = low : address 00 to 0fh used ssel = high : address 10 to 1fh used ssel = open : address 70 to 7fh used 3a sen serial communication enable pin 3b gnd gnd pin 3c v cc power supply voltage pin pd assignment *pd size for reference to be used for design sen gnd v cc sclk ssel sdio vop von top view 3 2 1 a b c 1.45mm 1.45mm 0.725mm 0.725mm center of pd sanyo : odcsp8(1.45x1.45) 0.08 (0.52) 0.67 max 1.45 1.45 top view side view side view bottom view 0.2 123 123 a b c 0.5 0.5 c b a
LV0223CV no.a1919-4/8 block diagram and test circuit diagram resister table enable selection of the register group from the ssel pin. ssel = low address 7 6 5 4 3 2 1 0 name 00h power iv gain sel gain sel iv gain2 default 00 00 00 1 0 value 11: power on 00/01/10: sleep *4 00/01: bd 10: dvd 11: cd *4 name 01h bd gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 02h dvd gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 03h cd gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 0eh test1 (*1) name 0fh test2 (*1) ssel = high address 7 6 5 4 3 2 1 0 name 10h power iv gain sel gain sel iv gain2 default 00 00 00 1 0 value 11: power on 00/01/10: sleep *4 00/01: bd 10: dvd 11: cd *4 name 11h bd gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 12h dvd gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 13h cd gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 1eh test1 (*1) name 1fh test2 (*1) continued on next page. + - vref low middle1 high2 + - vref serial sen sclk sdio ssel bias regulator vref v cc control 20pf vo+ vo- 20pf v cc gnd middle2 high1
LV0223CV no.a1919-5/8 continued from preceding page. ssel = open address 7 6 5 4 3 2 1 0 name 70h power iv gain sel gain sel iv gain2 default 00 00 00 1 0 value 11: power on 00/01/10: sleep *4 00/01: bd 10: dvd 11: cd *4 name 71h bd gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 72h dvd gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 73h cd gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 7eh test1 (*1) name 7fh test2 (*1) *1 test1 and test2 are either the time when power is applied or ? 00000000? is set. do not attempt to change ?00000000? during o peration. ?00000000? is returned when reading is made. *2 no problem in terms of operation occurs even when writing is made to the address 04h to 0dh and 14h to 1dh and 74h to 7dh. ?00000000? is returned when this address is read. *3 when i performed address reading except the register group se t by an ssel terminal, i keep hi-z without paying a value. *4 please set the gain setting of the i/v am plifier referring to the table below. i/v amplifier gain setting table 00h/10h/70h 5 4 1 name iv gain1 set iv gain2 default 00 1 iv gain high2 00/01 1 high1 10/11 1 middle2 00/01 0 middle1 10 0 low 11 0
LV0223CV no.a1919-6/8 serial protocol sdio pin load / cl=20pf (the table below shows the design reference value.) parameter symbol min. typ. max. unit scl clock frequency write f scl 0 10 mhz scl clock frequency read f scl 0 4 mhz sdio data setup time t dsu 50 ns sdio data hold time t dho 50 ns sdio output delay t ddly 10 80 ns sen ?h? period t enh 1.6 s sen ?l? period t enl 200 ns scl rise time after sen rise t st a 60 ns sen fall time after final scl rise t sto 100 ns serial input ?h? voltage v i h 2.4 3.7 v serial input ?l? voltage v i l 0.6 v sdio output ?h? voltage v o h 2.5 2.9 3.3 v sdio output ?l? voltage v o l 0 0.3 0.8 v a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 1 2 3 4 5 6 789 10 11 12 13 14 15 16 msb lsb msb lsb mode address data (output data from host) (host) sen (host) sclk (host) sdio a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 12 3 4 5 6 789 10 11 12 13 14 15 16 msb lsb msb lsb mode address data (output data from host) (host) sen (host) sclk (host) sdio sdio write timing chart read timing chart t sta t enh (host) sen (host) sclk (host) sdio (host) sen (host) sclk (host) sdio sdio t enl t sto t dsu t dho t ddly write read
LV0223CV no.a1919-7/8 pin type equivalent circuit diagram sdio input output 3v 3v vop von output sclk sen input 3v ssel input
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